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author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-05-30 03:19:37 +0000 |
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committer | Tom Rini <trini@ti.com> | 2013-06-10 08:43:10 -0400 |
commit | 7f36c88f64ee1affd4db78b2c2f4a616abceb84c (patch) | |
tree | f6e30f41ecc62dab500515dd1cec7ec021df8e21 /board | |
parent | a5d439c2d3a55df2718eae19fb128e498f4bef87 (diff) | |
download | talos-obmc-uboot-7f36c88f64ee1affd4db78b2c2f4a616abceb84c.tar.gz talos-obmc-uboot-7f36c88f64ee1affd4db78b2c2f4a616abceb84c.zip |
ARM: DRA7xx: Update pinmux data
Updating pinmux data as specified in the latest DM
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/ti/dra7xx/mux_data.h | 38 |
1 files changed, 24 insertions, 14 deletions
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 04c95fd376..338a241ce7 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -29,19 +29,29 @@ #include <asm/arch/mux_dra7xx.h> const struct pad_conf_entry core_padconf_array_essential[] = { - {MMC1_CLK, (PTU | IEN | M0)}, /* MMC1_CLK */ - {MMC1_CMD, (PTU | IEN | M0)}, /* MMC1_CMD */ - {MMC1_DAT0, (PTU | IEN | M0)}, /* MMC1_DAT0 */ - {MMC1_DAT1, (PTU | IEN | M0)}, /* MMC1_DAT1 */ - {MMC1_DAT2, (PTU | IEN | M0)}, /* MMC1_DAT2 */ - {MMC1_DAT3, (PTU | IEN | M0)}, /* MMC1_DAT3 */ - {MMC1_SDCD, (PTU | IEN | M0)}, /* MMC1_SDCD */ - {MMC1_SDWP, (PTU | IEN | M0)}, /* MMC1_SDWP */ - {UART1_RXD, (PTU | IEN | M0)}, /* UART1_RXD */ - {UART1_TXD, (M0)}, /* UART1_TXD */ - {UART1_CTSN, (PTU | IEN | M0)}, /* UART1_CTSN */ - {UART1_RTSN, (M0)}, /* UART1_RTSN */ - {I2C1_SDA, (PTU | IEN | M0)}, /* I2C1_SDA */ - {I2C1_SCL, (PTU | IEN | M0)}, /* I2C1_SCL */ + {MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */ + {MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */ + {MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */ + {MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */ + {MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */ + {MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */ + {MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */ + {MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */ + {GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */ + {GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */ + {GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */ + {GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */ + {GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */ + {GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */ + {GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */ + {GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */ + {GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */ + {GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */ + {UART1_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_RXD */ + {UART1_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_TXD */ + {UART1_CTSN, (IEN | PTU | PDIS | M3)}, /* UART1_CTSN */ + {UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */ + {I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */ + {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */ }; #endif /* _MUX_DATA_DRA7XX_H_ */ |