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authorStefan Roese <sr@denx.de>2013-02-07 01:48:30 +0000
committerTom Rini <trini@ti.com>2013-03-11 17:00:28 -0400
commit7c9e89bd1f62ccd76eee8ad4c36185057576dd95 (patch)
tree41548e50ff2dddc30913c00200ba8ef41dd6d0c5 /board/pcippc2/pcippc2_fpga.h
parentefd7c11404e59874d4da86d04cab4acacf77d793 (diff)
downloadtalos-obmc-uboot-7c9e89bd1f62ccd76eee8ad4c36185057576dd95.tar.gz
talos-obmc-uboot-7c9e89bd1f62ccd76eee8ad4c36185057576dd95.zip
ppc: Remove PCIPPC2 and PCIPPC6 boards
These boards seem to be unmaintained for quite some time. So lets remove support for them completely. This also cleans up some common drivers/files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Guillaume Alexandre <guillaume.alexandre@gespac.ch> Acked-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/pcippc2/pcippc2_fpga.h')
-rw-r--r--board/pcippc2/pcippc2_fpga.h49
1 files changed, 0 insertions, 49 deletions
diff --git a/board/pcippc2/pcippc2_fpga.h b/board/pcippc2/pcippc2_fpga.h
deleted file mode 100644
index 850c331973..0000000000
--- a/board/pcippc2/pcippc2_fpga.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _PCIPPC2_FPGA_H_
-#define _PCIPPC2_FPGA_H_
-
-#define FPGA_VENDOR_ID 0x1310
-#define FPGA_DEVICE_ID 0x000d
-
-#define HW_FPGA0_INT 0x0000
-#define HW_FPGA0_BOARD 0x0060
-#define HW_FPGA0_UART1 0x0080
-#define HW_FPGA0_UART2 0x0100
-#define HW_FPGA0_RTC 0x2000
-#define HW_FPGA0_DOC 0x4000
-#define HW_FPGA1_RTC 0x0000
-#define HW_FPGA1_DOC 0x4000
-
-#define HW_FPGA0_INT_INTR_MASK 0x30
-#define HW_FPGA0_INT_INTR_STATUS 0x34
-#define HW_FPGA0_INT_INTR_EOI 0x40
-#define HW_FPGA0_INT_SERIAL_CONFIG 0x5c
-
-#define HW_FPGA0_WDT_CTRL 0x44
-#define HW_FPGA0_WDT_PROG 0x48
-#define HW_FPGA0_WDT_VAL 0x4c
-#define HW_FPGA0_WDT_REFRESH 0x50
-
-#endif
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