diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/esd/hub405/hub405.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | talos-obmc-uboot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz talos-obmc-uboot-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/esd/hub405/hub405.c')
| -rw-r--r-- | board/esd/hub405/hub405.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c index 38a6f7a4e1..8785e6c84f 100644 --- a/board/esd/hub405/hub405.c +++ b/board/esd/hub405/hub405.c @@ -125,23 +125,23 @@ int misc_init_r (void) * Set RS232/RS422 control (RS232 = high on GPIO) */ val = in32(GPIO0_OR); - val &= ~(CFG_UART2_RS232 | CFG_UART3_RS232 | CFG_UART4_RS232 | CFG_UART5_RS232); + val &= ~(CONFIG_SYS_UART2_RS232 | CONFIG_SYS_UART3_RS232 | CONFIG_SYS_UART4_RS232 | CONFIG_SYS_UART5_RS232); str = getenv("phys0"); if (!str || (str && (str[0] == '0'))) - val |= CFG_UART2_RS232; + val |= CONFIG_SYS_UART2_RS232; str = getenv("phys1"); if (!str || (str && (str[0] == '0'))) - val |= CFG_UART3_RS232; + val |= CONFIG_SYS_UART3_RS232; str = getenv("phys2"); if (!str || (str && (str[0] == '0'))) - val |= CFG_UART4_RS232; + val |= CONFIG_SYS_UART4_RS232; str = getenv("phys3"); if (!str || (str && (str[0] == '0'))) - val |= CFG_UART5_RS232; + val |= CONFIG_SYS_UART5_RS232; out32(GPIO0_OR, val); @@ -174,9 +174,9 @@ int misc_init_r (void) /* * Reset external DUARTs */ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */ + out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */ udelay(10); /* wait 10us */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */ + out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */ udelay(1000); /* wait 1ms */ /* |
