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| author | Stefan Roese <sr@denx.de> | 2009-06-05 05:45:41 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-06-12 20:47:18 +0200 |
| commit | ae7a2739d7a0704437376e229bb21940952c55be (patch) | |
| tree | f8b1582a1c43af24a55f5a207816acad7a8d4d48 /board/esd/cpci750/pci.c | |
| parent | e5b563e9ec54c3f6d702c8fa2b711b4a6150243a (diff) | |
| download | talos-obmc-uboot-ae7a2739d7a0704437376e229bb21940952c55be.tar.gz talos-obmc-uboot-ae7a2739d7a0704437376e229bb21940952c55be.zip | |
74xx_7xx: CPCI750: Enable access to PCI function > 0
The Marvell bridge 64360 supports serveral PCI functions, not only 0. This
patch enables access to those functions.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Diffstat (limited to 'board/esd/cpci750/pci.c')
| -rw-r--r-- | board/esd/cpci750/pci.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/board/esd/cpci750/pci.c b/board/esd/cpci750/pci.c index bfc7e555b3..3b59b16b1c 100644 --- a/board/esd/cpci750/pci.c +++ b/board/esd/cpci750/pci.c @@ -768,11 +768,12 @@ static int gt_read_config_dword (struct pci_controller *hose, int bus = PCI_BUS (dev); if ((bus == local_buses[0]) || (bus == local_buses[1])) { - *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, offset, + *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, + offset | (PCI_FUNC(dev) << 8), PCI_DEV (dev)); } else { - *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose-> - cfg_addr, offset, + *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose->cfg_addr, + offset | (PCI_FUNC(dev) << 8), PCI_DEV (dev), bus); } @@ -785,13 +786,16 @@ static int gt_write_config_dword (struct pci_controller *hose, int bus = PCI_BUS (dev); if ((bus == local_buses[0]) || (bus == local_buses[1])) { - pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, offset, + pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, + offset | (PCI_FUNC(dev) << 8), PCI_DEV (dev), value); } else { pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr, - offset, PCI_DEV (dev), bus, + offset | (PCI_FUNC(dev) << 8), + PCI_DEV (dev), bus, value); } + return 0; } |
