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| author | Stefan Roese <sr@denx.de> | 2007-10-15 11:29:33 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-10-15 11:29:33 +0200 |
| commit | 5a5958b7de70ae99f0e7cbd5c97ec1346e051587 (patch) | |
| tree | 3f3830d2dfc19992bc1631c090d2a46d89cc989e /board/amcc/yosemite | |
| parent | f8bf90461d9bad2e6fed31fcebaf235f60dd6763 (diff) | |
| download | talos-obmc-uboot-5a5958b7de70ae99f0e7cbd5c97ec1346e051587.tar.gz talos-obmc-uboot-5a5958b7de70ae99f0e7cbd5c97ec1346e051587.zip | |
ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite
The BCSR status bit for the 66MHz PCI operation was correctly
addressed (MSB/LSB problem). Now the correct currently setup
PCI frequency is displayed upon bootup.
This patch also fixes this problem on Rainier & Yellowstone, since these
boards use the same souce code as Sequoia & Yosemite do.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/yosemite')
| -rw-r--r-- | board/amcc/yosemite/yosemite.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 912f09ee43..6ec922ab00 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -1,4 +1,6 @@ /* + * (C) Copyright 2006-2007 + * Stefan Roese, DENX Software Engineering, sr@denx.de. * * See file CREDITS for list of people who contributed to this * project. @@ -22,6 +24,7 @@ #include <common.h> #include <ppc4xx.h> #include <asm/processor.h> +#include <asm/io.h> #include <spd_sdram.h> DECLARE_GLOBAL_DATA_PTR; @@ -181,8 +184,8 @@ int checkboard(void) printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board"); #endif - rev = *(u8 *)(CFG_CPLD + 0); - val = *(u8 *)(CFG_CPLD + 5) & 0x01; + rev = in_8((void *)(CFG_BCSR_BASE + 0)); + val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN; printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); if (s != NULL) { |
