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| author | TENART Antoine <atenart@adeneo-embedded.com> | 2013-07-02 12:05:58 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-08-15 18:38:37 -0400 |
| commit | 9ed6e41239e17c97d786219b5ffca4a8a118c71f (patch) | |
| tree | 6d2150e68af1fc52d88888488a74ecf9d62923cb /arch | |
| parent | 03efcb05054fb7da9ef5fc76244bfa40e2e2c4b5 (diff) | |
| download | talos-obmc-uboot-9ed6e41239e17c97d786219b5ffca4a8a118c71f.tar.gz talos-obmc-uboot-9ed6e41239e17c97d786219b5ffca4a8a118c71f.zip | |
Prepare for TI816X : reuse existing code from TI814X
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX
Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/omap.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 8f27507742..b723e22a5c 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -16,7 +16,7 @@ COBJS += cache_v7.o COBJS += cpu.o COBJS += syslib.o -ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI814X),) +ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX),) SOBJS += lowlevel_init.o endif diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index d54cf5e1bb..1f8431196f 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -19,7 +19,7 @@ #define NON_SECURE_SRAM_START 0x402F0400 #define NON_SECURE_SRAM_END 0x40310000 #define SRAM_SCRATCH_SPACE_ADDR 0x4030C000 -#elif defined(CONFIG_TI814X) +#elif defined(CONFIG_TI81XX) #define NON_SECURE_SRAM_START 0x40300000 #define NON_SECURE_SRAM_END 0x40320000 #define SRAM_SCRATCH_SPACE_ADDR 0x4031B800 |
