diff options
| author | Simon Glass <sjg@chromium.org> | 2016-03-11 22:07:11 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 10:27:25 +0800 |
| commit | e77b62e2906affb94f442ce7735762883f8147af (patch) | |
| tree | cccb300e21f32fab3723439a9445b9325d302c4e /arch/x86 | |
| parent | 6499277827f5b0ceeb0447805ba4807307de78d2 (diff) | |
| download | talos-obmc-uboot-e77b62e2906affb94f442ce7735762883f8147af.tar.gz talos-obmc-uboot-e77b62e2906affb94f442ce7735762883f8147af.zip | |
x86: Update microcode for secondary CPUs
Each CPU needs to have its microcode loaded. Add support for this so that
all CPUs will have the same version.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/cpu/cpu.c | 1 | ||||
| -rw-r--r-- | arch/x86/cpu/intel_common/car.S | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/mp_init.c | 6 | ||||
| -rw-r--r-- | arch/x86/include/asm/microcode.h | 3 | ||||
| -rw-r--r-- | arch/x86/lib/fsp/fsp_car.S | 2 |
5 files changed, 12 insertions, 2 deletions
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 7dfe0713ba..233a6c8695 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -27,6 +27,7 @@ #include <asm/control_regs.h> #include <asm/cpu.h> #include <asm/lapic.h> +#include <asm/microcode.h> #include <asm/mp.h> #include <asm/msr.h> #include <asm/mtrr.h> diff --git a/arch/x86/cpu/intel_common/car.S b/arch/x86/cpu/intel_common/car.S index 81ac976ddd..6e0db96c01 100644 --- a/arch/x86/cpu/intel_common/car.S +++ b/arch/x86/cpu/intel_common/car.S @@ -237,5 +237,7 @@ mtrr_table_end: .align 4 _dt_ucode_base_size: /* These next two fields are filled in by ifdtool */ +.globl ucode_base +ucode_base: /* Declared in microcode.h */ .long 0 /* microcode base */ .long 0 /* microcode size */ diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index 4cc655566c..2604a687ab 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -248,8 +248,10 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) if (!stack) return -ENOMEM; params->stack_top = (u32)(stack + size); - - params->microcode_ptr = 0; +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) + params->microcode_ptr = ucode_base; + debug("Microcode at %x\n", params->microcode_ptr); +#endif params->msr_table_ptr = (u32)msr_save; ret = save_bsp_msrs(msr_save, sizeof(msr_save)); if (ret < 0) diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index 04789353ec..29bf060889 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -9,6 +9,9 @@ #ifndef __ASSEMBLY__ +/* This is a declaration for ucode_base in start.S */ +extern u32 ucode_base; + /** * microcode_update_intel() - Apply microcode updates * diff --git a/arch/x86/lib/fsp/fsp_car.S b/arch/x86/lib/fsp/fsp_car.S index 15b37512a5..fbe8aef540 100644 --- a/arch/x86/lib/fsp/fsp_car.S +++ b/arch/x86/lib/fsp/fsp_car.S @@ -102,6 +102,8 @@ temp_ram_init_romstack: temp_ram_init_params: _dt_ucode_base_size: /* These next two fields are filled in by ifdtool */ +.globl ucode_base +ucode_base: /* Declared in micrcode.h */ .long 0 /* microcode base */ .long 0 /* microcode size */ .long CONFIG_SYS_MONITOR_BASE /* code region base */ |
