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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-12-11 02:55:49 -0800 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-13 12:20:15 +0800 |
| commit | fa331fad1eee0bd86470b49a905ed176aa412b9a (patch) | |
| tree | 1fa5ce2a3743f59983688aa2b0c314df4fc21cb7 /arch/x86 | |
| parent | 33fb6c0100de6dbc79d0237418941cc40e94b16d (diff) | |
| download | talos-obmc-uboot-fa331fad1eee0bd86470b49a905ed176aa412b9a.tar.gz talos-obmc-uboot-fa331fad1eee0bd86470b49a905ed176aa412b9a.zip | |
x86: ivybridge: Do not require HAVE_INTEL_ME
Do not set HAVE_INTEL_ME by default as for some cases Intel ME
firmware even does not reside on the same SPI flash as U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/cpu/ivybridge/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index 56abd8fae3..1768a26a35 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -48,7 +48,6 @@ config DCACHE_RAM_MRC_VAR_SIZE config CPU_SPECIFIC_OPTIONS def_bool y select SMM_TSEG - select HAVE_INTEL_ME select X86_RAMTEST config SMM_TSEG_SIZE |
