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authorGraeme Russ <graeme.russ@gmail.com>2011-11-08 02:33:22 +0000
committerGraeme Russ <graeme.russ@gmail.com>2011-11-29 21:10:08 +1100
commit1cfcf0370132315d6eee375afdf7207ff60a07e0 (patch)
treea8be41d0ed86376fb1cc9d35dc103f3120f52502 /arch/x86/lib
parent303418cc97c0922cdbbc328e6d9111bd9a84d1c7 (diff)
downloadtalos-obmc-uboot-1cfcf0370132315d6eee375afdf7207ff60a07e0.tar.gz
talos-obmc-uboot-1cfcf0370132315d6eee375afdf7207ff60a07e0.zip
x86: Misc PCI touchups
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Diffstat (limited to 'arch/x86/lib')
-rw-r--r--arch/x86/lib/pci_type1.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/x86/lib/pci_type1.c b/arch/x86/lib/pci_type1.c
index 6fc4df47d3..a25fa051d5 100644
--- a/arch/x86/lib/pci_type1.c
+++ b/arch/x86/lib/pci_type1.c
@@ -50,7 +50,11 @@ TYPE1_PCI_OP(write, byte, u8, outb, 3)
TYPE1_PCI_OP(write, word, u16, outw, 2)
TYPE1_PCI_OP(write, dword, u32, outl, 0)
-void pci_setup_type1(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
+/* bus mapping constants (used for PCI core initialization) */
+#define PCI_REG_ADDR 0x00000cf8
+#define PCI_REG_DATA 0x00000cfc
+
+void pci_setup_type1(struct pci_controller *hose)
{
pci_set_ops(hose,
type1_read_config_byte,
@@ -60,6 +64,6 @@ void pci_setup_type1(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
type1_write_config_word,
type1_write_config_dword);
- hose->cfg_addr = (unsigned int *)cfg_addr;
- hose->cfg_data = (unsigned char *)cfg_data;
+ hose->cfg_addr = (unsigned int *)PCI_REG_ADDR;
+ hose->cfg_data = (unsigned char *)PCI_REG_DATA;
}
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