diff options
| author | Simon Glass <sjg@chromium.org> | 2015-03-02 12:40:49 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-04-16 19:27:40 -0600 |
| commit | 892ff8e972efc7d4f42750e4fdbb2c2fefb78229 (patch) | |
| tree | 04c9e2fb3ea8157b231dfca85d29412c281051ec /arch/x86/cpu/coreboot/sdram.c | |
| parent | 4564faeafbf11feb839e2e3f927be2f1a919ba96 (diff) | |
| download | talos-obmc-uboot-892ff8e972efc7d4f42750e4fdbb2c2fefb78229.tar.gz talos-obmc-uboot-892ff8e972efc7d4f42750e4fdbb2c2fefb78229.zip | |
x86: Support machines with >4GB of RAM
Some systems have more than 4GB of RAM. U-Boot can only place things below
4GB so any memory above that should not be used. Ignore any such memory so
that the memory size will not exceed the maximum.
This prevents gd->ram_size exceeding 4GB which causes problems for PCI
devices which use DMA.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Diffstat (limited to 'arch/x86/cpu/coreboot/sdram.c')
| -rw-r--r-- | arch/x86/cpu/coreboot/sdram.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index e98a2302e7..9c3ab81734 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -90,7 +90,8 @@ int dram_init(void) struct memrange *memrange = &lib_sysinfo.memrange[i]; unsigned long long end = memrange->base + memrange->size; - if (memrange->type == CB_MEM_RAM && end > ram_size) + if (memrange->type == CB_MEM_RAM && end > ram_size && + memrange->base < (1ULL << 32)) ram_size = end; } gd->ram_size = ram_size; @@ -108,7 +109,8 @@ void dram_init_banksize(void) for (i = 0, j = 0; i < lib_sysinfo.n_memranges; i++) { struct memrange *memrange = &lib_sysinfo.memrange[i]; - if (memrange->type == CB_MEM_RAM) { + if (memrange->type == CB_MEM_RAM && + memrange->base < (1ULL << 32)) { gd->bd->bi_dram[j].start = memrange->base; gd->bd->bi_dram[j].size = memrange->size; j++; |
