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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-07-22 01:21:15 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-28 10:36:25 -0600 |
| commit | 1ed6648be08e4da76a08a09317932c73db0745ff (patch) | |
| tree | f49ac261eae9a6a19304bf8bddf1fd74ee7ed0d8 /arch/x86/Kconfig | |
| parent | 9830d2ebb4f1683ff7f50b3420374a1843839378 (diff) | |
| download | talos-obmc-uboot-1ed6648be08e4da76a08a09317932c73db0745ff.tar.gz talos-obmc-uboot-1ed6648be08e4da76a08a09317932c73db0745ff.zip | |
x86: Reserve PCIe ECAM address range in the E820 table
We should mark PCIe ECAM address range in the E820 table as reserved
otherwise kernel will not attempt to use ECAM.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index cbbaa4f2ce..e8968a7182 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -369,4 +369,14 @@ config PCIE_ECAM_BASE assigned to PCI devices - i.e. the memory and prefetch regions, as passed to pci_set_region(). +config PCIE_ECAM_SIZE + hex + default 0x10000000 + help + This is the size of memory-mapped address of PCI configuration space, + which is only available through the Enhanced Configuration Access + Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, + so a default 0x10000000 size covers all of the 256 buses which is the + maximum number of PCI buses as defined by the PCI specification. + endmenu |
