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author | Simon Glass <sjg@chromium.org> | 2015-08-04 12:34:00 -0600 |
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committer | Simon Glass <sjg@chromium.org> | 2015-08-05 08:44:08 -0600 |
commit | e49cceac61a0f56beff466f844fb9b3451d564eb (patch) | |
tree | f82a912a899cf687bf46215daa20fabc96acc1ca /arch/x86/Kconfig | |
parent | f1a0bafb5802416d42d685b343110c1557da1739 (diff) | |
download | talos-obmc-uboot-e49cceac61a0f56beff466f844fb9b3451d564eb.tar.gz talos-obmc-uboot-e49cceac61a0f56beff466f844fb9b3451d564eb.zip |
x86: Handle running as EFI payload
When U-Boot runs as an EFI payload it needs to avoid setting up the CPU
again. Also U-Boot currently does not handle interrupts for many devices, so
run with interrupts disabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/Kconfig')
-rw-r--r-- | arch/x86/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index f124d58fde..01ed76042f 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -194,6 +194,7 @@ config X86_RAMTEST config HAVE_FSP bool "Add an Firmware Support Package binary" + depends on !EFI help Select this option to add an Firmware Support Package binary to the resulting U-Boot image. It is a binary blob which U-Boot uses @@ -309,6 +310,7 @@ menu "System tables" config GENERATE_PIRQ_TABLE bool "Generate a PIRQ table" + depends on !EFI default n help Generate a PIRQ routing table for this board. The PIRQ routing table @@ -319,6 +321,7 @@ config GENERATE_PIRQ_TABLE config GENERATE_SFI_TABLE bool "Generate a SFI (Simple Firmware Interface) table" + depends on !EFI help The Simple Firmware Interface (SFI) provides a lightweight method for platform firmware to pass information to the operating system @@ -333,6 +336,7 @@ config GENERATE_SFI_TABLE config GENERATE_MP_TABLE bool "Generate an MP (Multi-Processor) table" + depends on !EFI default n help Generate an MP (Multi-Processor) table for this board. The MP table @@ -383,4 +387,6 @@ config PCIE_ECAM_SIZE so a default 0x10000000 size covers all of the 256 buses which is the maximum number of PCI buses as defined by the PCI specification. +source "arch/x86/lib/efi/Kconfig" + endmenu |