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authorKumar Gala <galak@kernel.crashing.org>2010-12-30 12:09:53 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:21 -0600
commita09b9b68d492e978ef0e14cae93ff9cfbc2d3e4b (patch)
tree07f0d677a4d7ac227abc90cdbbd90d306641f76e /arch/powerpc/cpu/mpc8xxx/fdt.c
parent213ac73e2caff8b477c31f85d8132f8cc116f366 (diff)
downloadtalos-obmc-uboot-a09b9b68d492e978ef0e14cae93ff9cfbc2d3e4b.tar.gz
talos-obmc-uboot-a09b9b68d492e978ef0e14cae93ff9cfbc2d3e4b.zip
powerpc/8xxx: Refactor SRIO initialization into common code
Moved the SRIO init out of corenet_ds and into common code for 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe controllers for SRIO. We utilize the fact that SRIO is over serdes to determine if its configured or not and thus can setup the LAWs needed for it dynamically. We additionally update the device tree (to remove the SRIO nodes) if the board doesn't have SRIO enabled. Introduced the following standard defines for board config.h: CONFIG_SYS_SRIO - Chip has SRIO or not CONFIG_SRIO1 - Board has SRIO 1 port available CONFIG_SRIO2 - Board has SRIO 2 port available (where 'n' is the port #) CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup) CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup) [ These mimic what we have for PCI and PCIe controllers ] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/fdt.c')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/fdt.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 54e60bb1ae..0c166fd6c9 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
*
* This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
* arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
@@ -28,6 +28,7 @@
#include <fdt_support.h>
#include <asm/mp.h>
#include <asm/fsl_enet.h>
+#include <asm/fsl_serdes.h>
#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
static int ft_del_cpuhandle(void *blob, int cpuhandle)
@@ -239,3 +240,23 @@ int fdt_fixup_phy_connection(void *blob, int offset, enum fsl_phy_enet_if phyc)
return fdt_setprop_string(blob, offset, "phy-connection-type",
fsl_phy_enet_if_str[phyc]);
}
+
+#ifdef CONFIG_SYS_SRIO
+void ft_srio_setup(void *blob)
+{
+#ifdef CONFIG_SRIO1
+ if (!is_serdes_configured(SRIO1)) {
+ fdt_del_node_and_alias(blob, "rio0");
+ }
+#else
+ fdt_del_node_and_alias(blob, "rio0");
+#endif
+#ifdef CONFIG_SRIO2
+ if (!is_serdes_configured(SRIO2)) {
+ fdt_del_node_and_alias(blob, "rio1");
+ }
+#else
+ fdt_del_node_and_alias(blob, "rio1");
+#endif
+}
+#endif
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