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authorTimur Tabi <timur@freescale.com>2011-08-05 16:15:24 -0500
committerKumar Gala <galak@kernel.crashing.org>2011-09-29 19:01:05 -0500
commitfbb9ecf7493fbd6b8c8af7d52e90c915459f7040 (patch)
treeb19bce4d9c77be58fc1aba43bd73625222c99f8f /arch/powerpc/cpu/mpc8xxx/cpu.c
parent86df5142a14868ea0e24511f4293d43a611a2b39 (diff)
downloadtalos-obmc-uboot-fbb9ecf7493fbd6b8c8af7d52e90c915459f7040.tar.gz
talos-obmc-uboot-fbb9ecf7493fbd6b8c8af7d52e90c915459f7040.zip
powerpc/mp: add support for discontiguous cores
Some SOCs have discontiguously-numbered cores, and so we can't determine the valid core numbers via the FRR register any more. We define CPU_TYPE_ENTRY_MASK to specify a discontiguous core mask, and helper functions to process the mask and enumerate over the set of valid cores. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/cpu.c')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/cpu.c36
1 files changed, 34 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 767bc524d1..bb572cfff1 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -129,13 +129,33 @@ struct cpu_type *identify_cpu(u32 ver)
return &cpu_type_unknown;
}
+#define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00
+#define MPC8xxx_PICFRR_NCPU_SHIFT 8
+
+/*
+ * Return a 32-bit mask indicating which cores are present on this SOC.
+ */
+u32 cpu_mask()
+{
+ ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
+ struct cpu_type *cpu = gd->cpu;
+
+ /* better to query feature reporting register than just assume 1 */
+ if (cpu == &cpu_type_unknown)
+ return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
+ MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
+
+ return cpu->mask;
+}
+
+/*
+ * Return the number of cores on this SOC.
+ */
int cpu_numcores() {
ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
struct cpu_type *cpu = gd->cpu;
/* better to query feature reporting register than just assume 1 */
-#define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00
-#define MPC8xxx_PICFRR_NCPU_SHIFT 8
if (cpu == &cpu_type_unknown)
return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
@@ -143,6 +163,18 @@ int cpu_numcores() {
return cpu->num_cores;
}
+/*
+ * Check if the given core ID is valid
+ *
+ * Returns zero if it isn't, 1 if it is.
+ */
+int is_core_valid(unsigned int core)
+{
+ struct cpu_type *cpu = gd->cpu;
+
+ return !!((1 << core) & cpu->mask);
+}
+
int probecpu (void)
{
uint svr;
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