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| author | Ying Zhang <b40530@freescale.com> | 2013-05-20 14:07:23 +0800 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-06-20 17:08:50 -0500 |
| commit | 5df572f0131cf5e0abd8ce4e8f57841b790c40d4 (patch) | |
| tree | 23a4eb5bd8468e4172a137946838ef7f9ad8e091 /arch/powerpc/cpu/mpc85xx/u-boot.lds | |
| parent | 505c293ffd67170507154c3660d8d880d3edd9da (diff) | |
| download | talos-obmc-uboot-5df572f0131cf5e0abd8ce4e8f57841b790c40d4.tar.gz talos-obmc-uboot-5df572f0131cf5e0abd8ce4e8f57841b790c40d4.zip | |
powerpc/mpc85xx: support application without resetvec segment in the linker script
For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM,
then jump to it to begin execution. After that, the SPL loads the final uboot
image into DDR, then jump to it to begin execution. The segment .resetvec in
the SPL and in final U-boot is useless.
So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application.
If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded
and the segment .bootpg is placed in the previous 4K of the segment .text.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/u-boot.lds')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/u-boot.lds | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 0503dce5ae..2643563d4d 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -95,6 +95,13 @@ SECTIONS . = ALIGN(256); __init_end = .; +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC + .bootpg ADDR(.text) - 0x1000 : + { + KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) + } :text = 0xffff + . = ADDR(.text) + 0x80000; +#else .bootpg RESET_VECTOR_ADDRESS - 0xffc : { arch/powerpc/cpu/mpc85xx/start.o (.bootpg) @@ -117,6 +124,7 @@ SECTIONS #if (RESET_VECTOR_ADDRESS == 0xfffffffc) . |= 0x10; #endif +#endif __bss_start = .; .bss (NOLOAD) : |
