diff options
author | Stefan Roese <sr@denx.de> | 2012-08-16 17:53:18 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2012-12-05 17:30:51 +0100 |
commit | 083f2e08d2265a096a1ab52d43b4abb8e069977d (patch) | |
tree | fad17ff01eed2e8a5d4d0f3208eaf3f837708ac3 /arch/powerpc/cpu/mpc5xxx/start.S | |
parent | d3aa8b8be2204e709fe307787dfbd8234316b41b (diff) | |
download | talos-obmc-uboot-083f2e08d2265a096a1ab52d43b4abb8e069977d.tar.gz talos-obmc-uboot-083f2e08d2265a096a1ab52d43b4abb8e069977d.zip |
mpc5200: Add SPL support
This patch adds SPL booting support (NOR flash) for the
MPC5200 platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/powerpc/cpu/mpc5xxx/start.S')
-rw-r--r-- | arch/powerpc/cpu/mpc5xxx/start.S | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S index 51cc4e2a10..ad5bc0a179 100644 --- a/arch/powerpc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -50,6 +50,7 @@ #define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI) #endif +#ifndef CONFIG_SPL_BUILD /* * Set up GOT: Global Offset Table * @@ -68,6 +69,7 @@ GOT_ENTRY(__bss_end__) GOT_ENTRY(__bss_start) END_GOT +#endif /* * Version string @@ -84,6 +86,18 @@ version_string: . = EXC_OFF_SYS_RESET .globl _start _start: + +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) + /* + * This is the entry of the real U-Boot from a board port + * that supports SPL booting on the MPC5200. We only need + * to call board_init_f() here. Everything else has already + * been done in the SPL u-boot version. + */ + GET_GOT /* initialize GOT access */ + bl board_init_f /* run 1st part of board init code (in Flash)*/ + /* NOTREACHED - board_init_f() does not return */ +#else mfmsr r5 /* save msr contents */ /* Move CSBoot and adjust instruction pointer */ @@ -152,7 +166,9 @@ lowboot_reentry: /* Be careful to keep code relocatable ! */ /*--------------------------------------------------------------*/ +#ifndef CONFIG_SPL_BUILD GET_GOT /* initialize GOT access */ +#endif /* r3: IMMR */ bl cpu_init_f /* run low-level CPU init code (in Flash)*/ @@ -160,7 +176,9 @@ lowboot_reentry: bl board_init_f /* run 1st part of board init code (in Flash)*/ /* NOTREACHED - board_init_f() does not return */ +#endif +#ifndef CONFIG_SPL_BUILD /* * Vector Table */ @@ -333,6 +351,7 @@ int_return: lwz r1,GPR1(r1) SYNC rfi +#endif /* CONFIG_SPL_BUILD */ /* * This code initialises the MPC5xxx processor core @@ -522,6 +541,7 @@ get_pvr: mfspr r3, PVR blr +#ifndef CONFIG_SPL_BUILD /*------------------------------------------------------------------------------*/ /* @@ -759,3 +779,5 @@ trap_init: mtlr r4 /* restore link register */ blr + +#endif /* CONFIG_SPL_BUILD */ |