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| author | Paul Burton <paul.burton@imgtec.com> | 2016-06-09 13:09:52 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-06-10 12:27:37 +0200 |
| commit | 4b7b0a0f0635c1d1e4a0ae2ed172530b5f78e74b (patch) | |
| tree | 0f26b510e8a822b1059b567fba36669bf1b4bba9 /arch/mips | |
| parent | a95800e881a8df837f0c4121a2cd560a4c02bd2f (diff) | |
| download | talos-obmc-uboot-4b7b0a0f0635c1d1e4a0ae2ed172530b5f78e74b.tar.gz talos-obmc-uboot-4b7b0a0f0635c1d1e4a0ae2ed172530b5f78e74b.zip | |
MIPS: Make CONFIG_SYS_DCACHE_LINE_SIZE int, not hex
For consistency with the other cache-related Kconfig entries & the
values actually set by boards, make CONFIG_SYS_DCACHE_LINE_SIZE an int
entry instead of a hex entry.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 372286217f05 ("MIPS: Split I & D cache line size config")
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5c30ae981d..21066f0fda 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -253,7 +253,7 @@ config SYS_DCACHE_SIZE The total size of the L1 Dcache, if known at compile time. config SYS_DCACHE_LINE_SIZE - hex + int default 0 help The size of L1 Dcache lines, if known at compile time. |
