mips: add base support for QCA/Atheros ath79 SOCs

This patch add some common code for QCA/Atheros ath79 SOCs such as
DDR tuning, chip reset and CPU detection.

Signed-off-by: Wills Wang <wills.wang@live.com>

1 files changed, 16 insertions, 0 deletions

diff --git a/arch/mips/mach-ath79/dram.c b/arch/mips/mach-ath79/dram.c
new file mode 100644
index 0000000000..c29e98c2f4
--- /dev/null
+++ b/arch/mips/mach-ath79/dram.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/sizes.h>
+#include <asm/addrspace.h>
+#include <mach/ddr.h>
+
+phys_size_t initdram(int board_type)
+{
+	ddr_tap_tuning();
+	return get_ram_size((void *)KSEG1, SZ_256M);
+}