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authorAlexander Graf <agraf@suse.de>2016-03-21 20:26:12 +0100
committerYork Sun <york.sun@nxp.com>2016-03-21 12:42:10 -0700
commitc05016ab0b122b28395f0532e6447e5ec2705fe9 (patch)
treecd252c3b68cd8b6024259c6b50f52325f32d9da3 /arch/arm
parentf23baa572f96e1e13d7f1a3c8addb61b5d0dbd29 (diff)
downloadtalos-obmc-uboot-c05016ab0b122b28395f0532e6447e5ec2705fe9.tar.gz
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arm64: Fix layerscape mmu setup
With commit 7985cdf we converted all systems except for the Layerscape SoCs to the generic descriptor table based page table setup. On the Layerscape SoCs however, we just provide an empty table stub and do the setup ourselves. To reserve enough memory for the tables, we need to override the default counting mechanism which would end up with an empty table because we have no maps. Fixes: 7985cdf Reported-by: York Sun <york.sun@nxp.com> CC: Alison Wang <alison.wang@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv8/cache_v8.c2
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/cpu.c5
2 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index d1bd06bedf..1615542a99 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -320,7 +320,7 @@ static int count_required_pts(u64 addr, int level, u64 maxaddr)
}
/* Returns the estimated required size of all page tables */
-u64 get_page_table_size(void)
+__weak u64 get_page_table_size(void)
{
u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64);
u64 size = 0;
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 7404bd932a..4b9e209054 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -410,6 +410,11 @@ static inline void final_mmu_setup(void)
*/
}
+u64 get_page_table_size(void)
+{
+ return 0x10000;
+}
+
int arch_cpu_init(void)
{
icache_enable();
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