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| author | York Sun <yorksun@freescale.com> | 2014-12-08 15:30:55 -0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-01-23 22:29:13 -0600 |
| commit | dda3b610eee9dcd433627202584ded417327dd51 (patch) | |
| tree | de7d6037e6730f3fd9bc2baa086dd74f449d0fd6 /arch/arm | |
| parent | 37b608a52dcb13312a4f7ccea199cd6bac76d298 (diff) | |
| download | talos-obmc-uboot-dda3b610eee9dcd433627202584ded417327dd51.tar.gz talos-obmc-uboot-dda3b610eee9dcd433627202584ded417327dd51.zip | |
arm/ls1021a: Add workaround for DDR erratum A008378
Internal memory controller counters can reach a bad state after
training in DDR4 mode if accumulated ECC or DBI mode is eanbled.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/include/asm/arch-ls102xa/config.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 5e934da797..a06ef9dcbf 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -97,6 +97,7 @@ #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 #define CONFIG_SYS_FSL_SEC_COMPAT 5 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_FSL_ERRATUM_A008378 #else #error SoC not defined #endif |
