diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-21 14:43:18 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-24 09:54:08 +0900 |
| commit | 9d0c2ceb35be7016977560a92fc67e3e704e5c9f (patch) | |
| tree | 67f17e8bbc13a293b7d24f7789a3fb0692c1e284 /arch/arm/mach-uniphier/pinctrl | |
| parent | 881aa5a79a94a65500959428328f348a18d3d9fe (diff) | |
| download | talos-obmc-uboot-9d0c2ceb35be7016977560a92fc67e3e704e5c9f.tar.gz talos-obmc-uboot-9d0c2ceb35be7016977560a92fc67e3e704e5c9f.zip | |
ARM: uniphier: add PH1-LD20 SoC support
This is the first ARMv8 SoC from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/pinctrl')
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c | 46 |
2 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile index 5504c24c3d..b579cb06e7 100644 --- a/arch/arm/mach-uniphier/pinctrl/Makefile +++ b/arch/arm/mach-uniphier/pinctrl/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pinctrl-sld8.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += pinctrl-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += pinctrl-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += pinctrl-ld6b.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pinctrl-ld20.o diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c new file mode 100644 index 0000000000..6066b169cf --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> + +#include "../init.h" +#include "../sg-regs.h" + +void uniphier_ld20_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(3, 0, 8, 4); /* XNFWP -> XNFWP */ + sg_set_pinsel(4, 0, 8, 4); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(5, 0, 8, 4); /* NFRYBY0 -> NFRYBY0 */ + sg_set_pinsel(6, 0, 8, 4); /* XNFRE -> XNFRE */ + sg_set_pinsel(7, 0, 8, 4); /* XNFWE -> XNFWE */ + sg_set_pinsel(8, 0, 8, 4); /* NFALE -> NFALE */ + sg_set_pinsel(9, 0, 8, 4); /* NFCLE -> NFCLE */ + sg_set_pinsel(10, 0, 8, 4); /* NFD0 -> NFD0 */ + sg_set_pinsel(11, 0, 8, 4); /* NFD1 -> NFD1 */ + sg_set_pinsel(12, 0, 8, 4); /* NFD2 -> NFD2 */ + sg_set_pinsel(13, 0, 8, 4); /* NFD3 -> NFD3 */ + sg_set_pinsel(14, 0, 8, 4); /* NFD4 -> NFD4 */ + sg_set_pinsel(15, 0, 8, 4); /* NFD5 -> NFD5 */ + sg_set_pinsel(16, 0, 8, 4); /* NFD6 -> NFD6 */ + sg_set_pinsel(17, 0, 8, 4); /* NFD7 -> NFD7 */ + sg_set_iectrl_range(3, 17); +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(46, 0, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(47, 0, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(48, 0, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(49, 0, 8, 4); /* USB1OD -> USB1OD */ + sg_set_pinsel(50, 0, 8, 4); /* USB2VBUS -> USB2VBUS */ + sg_set_pinsel(51, 0, 8, 4); /* USB2OD -> USB2OD */ + sg_set_pinsel(52, 0, 8, 4); /* USB3VBUS -> USB3VBUS */ + sg_set_pinsel(53, 0, 8, 4); /* USB3OD -> USB3OD */ + sg_set_iectrl_range(46, 53); +#endif +} |
