path: root/arch/arm/mach-uniphier/ph1-pro4
diff options
authorMasahiro Yamada <>2015-09-22 00:27:36 +0900
committerMasahiro Yamada <>2015-09-25 00:27:53 +0900
commitfcbcd59730255018dbe78af9294598273a85a0de (patch)
tree6ca5a91bea033ed8545fa9566d765627bdb266ab /arch/arm/mach-uniphier/ph1-pro4
parent257b11f32d0ba451b8b7eba72f0db5e182d425dd (diff)
ARM: uniphier: fix glitch signal problem for low-level debug
Currently, IECTRL is enabled after pin-mux settings for the low-level debugging for PH1-LD4 and PH1-sLD8. While IECTRL is disabled, input signals are pulled-down, i.e. glitch signal (Low to High transition) problem occurs if pin-mux is set up first. As a result, one invalid character is input to the UART block and the auto-boot counting is terminated immediately. The correct initialization procedure is: [1] Enable IECTRL (if IECTRL exists for the pins) [2] Set up pin-muxing [3] Deassert the reset of the hardware block Currently, the low-level debugging is working for PH1-sLD3 and PH1-Pro4, but just in case, follow the sequence for all the SoCs. Signed-off-by: Masahiro Yamada <>
Diffstat (limited to 'arch/arm/mach-uniphier/ph1-pro4')
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S
index ce5dd4b15d..56f3851043 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S
+++ b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S
@@ -15,13 +15,6 @@
#include <mach/debug-uart.S>
- ldr r0, =SC_CLKCTRL
- ldr r1, [r0]
- orr r1, r1, #SC_CLKCTRL_CEN_PERI
- str r1, [r0]
- init_debug_uart r0, r1, r2
/* UART Port 0 */
sg_set_pinsel 127, 0, 4, 8, r0, r1
sg_set_pinsel 128, 0, 4, 8, r0, r1
@@ -30,5 +23,12 @@ ENTRY(setup_lowlevel_debug)
mov r1, #1
str r1, [r0]
+ ldr r0, =SC_CLKCTRL
+ ldr r1, [r0]
+ orr r1, r1, #SC_CLKCTRL_CEN_PERI
+ str r1, [r0]
+ init_debug_uart r0, r1, r2
mov pc, lr
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