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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-09-22 00:27:34 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2015-09-25 00:27:53 +0900
commit8497ccc4c23beae38130489d85c97ae38058f20b (patch)
tree9becb4f338637b145b31606c4e157e320a788987 /arch/arm/mach-uniphier/ph1-pro4
parentc8df23cf33571eda2cc22277a8f448e6221f8409 (diff)
downloadtalos-obmc-uboot-8497ccc4c23beae38130489d85c97ae38058f20b.tar.gz
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ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_*
I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify they belong to UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/ph1-pro4')
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/pll_init.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
index d693368816..8ae8ed65b8 100644
--- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
@@ -54,12 +54,10 @@ static void vpll_init(void)
tmp = readl(SG_PINMON0);
clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK;
-#if defined(CONFIG_MACH_PH1_PRO4)
/* 25MHz or 6.25MHz is default for Pro4R, no need to set VPLLA/B */
if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ ||
clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_6250KHZ)
return;
-#endif
/* Disable write protect of VPLL27ACTRL[2-7]*, VPLL27BCTRL[2-8] */
tmp = readl(SC_VPLL27ACTRL);
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