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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-27 02:26:51 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-03-01 00:02:36 +0900 |
| commit | 198a97a6abe7090109002baea0d2cb46070955aa (patch) | |
| tree | 4ee4cea278f41d5f16147152028785e3891cf97b /arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c | |
| parent | f267b81e20da095539c7da7103afbd1e1b39b20b (diff) | |
| download | talos-obmc-uboot-198a97a6abe7090109002baea0d2cb46070955aa.tar.gz talos-obmc-uboot-198a97a6abe7090109002baea0d2cb46070955aa.zip | |
ARM: UniPhier: split clkrst_init() into two functions
Split the current clkrst_init() into two functions:
- early_clkrst_init(): called from SPL
Deassert the reset signals of the memory controller and some other
basic cores.
- clkrst_init(): called from main U-boot
Deassert the reset signals that are necessary for the access to
peripherals etc.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c')
| -rw-r--r-- | arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c index eaa45f94d3..f5fc418ef0 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c @@ -1,11 +1,10 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> * * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> #include <asm/io.h> #include <mach/sc-regs.h> @@ -15,15 +14,26 @@ void clkrst_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); - tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1 - | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND; +#ifdef CONFIG_UNIPHIER_ETH + tmp |= SC_RSTCTRL_NRST_ETHER; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_RSTCTRL_NRST_NAND; +#endif writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ /* privide clocks */ tmp = readl(SC_CLKCTRL); - tmp |= SC_CLKCTRL_CEN_ETHER | SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_UMC - | SC_CLKCTRL_CEN_NAND | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; +#ifdef CONFIG_UNIPHIER_ETH + tmp |= SC_CLKCTRL_CEN_ETHER; +#endif +#ifdef CONFIG_USB_EHCI_UNIPHIER + tmp |= SC_CLKCTRL_CEN_MIO; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_CLKCTRL_CEN_NAND; +#endif writel(tmp, SC_CLKCTRL); readl(SC_CLKCTRL); /* dummy read */ } |
