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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-09-22 00:27:39 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2015-09-25 00:58:38 +0900
commit323d1f9d5bebfe55e97e23c8094055685665afef (patch)
tree4fe6b5ffd3aab68a945de9750d145514271d2321 /arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c
parent5451b777de392043c03626f6cbbc3940c49c3417 (diff)
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ARM: uniphier: allow to enable multiple SoCs
Before this commit, the Kconfig menu in mach-uniphier only allowed us to choose one SoC to be compiled. Each SoC has its own defconfig file for the build-test coverage. Consequently, some defconfig files are duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and CONFIG_{SOC_NAME}=y. Now, most of board-specific parameters have been moved to device trees, so it makes sense to include init code of multiple SoCs into a single image as long as the SoCs have similar architecture. In fact, some SoCs of UniPhier family are very similar: - PH1-LD4 and PH1-sLD8 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit) This commit will be helpful to merge some defconfig files for better maintainability. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c')
-rw-r--r--arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c
new file mode 100644
index 0000000000..1bb9375016
--- /dev/null
+++ b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <mach/init.h>
+#include <mach/sg-regs.h>
+
+int ph1_sld3_early_pin_init(const struct uniphier_board_data *bd)
+{
+ /* Comment format: PAD Name -> Function Name */
+
+#ifdef CONFIG_UNIPHIER_SERIAL
+ sg_set_pinsel(63, 0, 4, 4); /* RXD0 */
+ sg_set_pinsel(64, 1, 4, 4); /* TXD0 */
+
+ sg_set_pinsel(65, 0, 4, 4); /* RXD1 */
+ sg_set_pinsel(66, 1, 4, 4); /* TXD1 */
+
+ sg_set_pinsel(96, 2, 4, 4); /* RXD2 */
+ sg_set_pinsel(102, 2, 4, 4); /* TXD2 */
+#endif
+
+ return 0;
+}
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