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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-12-16 10:42:29 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-12-23 00:08:09 +0900 |
| commit | b04ed73a50fc03c7887f0b1887e11101e3b50a49 (patch) | |
| tree | 2b9bd299bf0ff505e17ec3cc9785d63a6cda8281 /arch/arm/mach-uniphier/ddrphy | |
| parent | a1c4bf8666ee170fa82528ac996b9dd472ed167f (diff) | |
| download | talos-obmc-uboot-b04ed73a50fc03c7887f0b1887e11101e3b50a49.tar.gz talos-obmc-uboot-b04ed73a50fc03c7887f0b1887e11101e3b50a49.zip | |
ARM: uniphier: rename DTCR_RNKEN_* register bit to DTCR_RANKEN_*
The bit 27-24 of the DTCR register is described as RANKEN in the
DDR PHY databook. Follow this abbreviation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/ddrphy')
| -rw-r--r-- | arch/arm/mach-uniphier/ddrphy/ddrphy-training.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-uniphier/ddrphy/ddrphy-training.c b/arch/arm/mach-uniphier/ddrphy/ddrphy-training.c index f1a2341d9c..b4d369a824 100644 --- a/arch/arm/mach-uniphier/ddrphy/ddrphy-training.c +++ b/arch/arm/mach-uniphier/ddrphy/ddrphy-training.c @@ -32,8 +32,8 @@ void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank) /* Use Multi-Purpose Register for DQS gate training */ tmp |= DTCR_DTMPR; /* Specify the rank enabled for data-training */ - tmp &= ~DTCR_RNKEN_MASK; - tmp |= (1 << (DTCR_RNKEN_SHIFT + rank)) & DTCR_RNKEN_MASK; + tmp &= ~DTCR_RANKEN_MASK; + tmp |= (1 << (DTCR_RANKEN_SHIFT + rank)) & DTCR_RANKEN_MASK; writel(tmp, p); } |
