ARM: uniphier: allow to enable multiple SoCs

Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled.  Each SoC has its own defconfig file
for the build-test coverage.  Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y.

Now, most of board-specific parameters have been moved to device trees,
so it makes sense to include init code of multiple SoCs into a single
image as long as the SoCs have similar architecture.  In fact, some
SoCs of UniPhier family are very similar:
 - PH1-LD4 and PH1-sLD8
 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit)

This commit will be helpful to merge some defconfig files for better
maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

1 files changed, 93 insertions, 0 deletions

diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
new file mode 100644
index 0000000000..6a5ea2e585
--- /dev/null
+++ b/arch/arm/mach-uniphier/boards.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <libfdt.h>
+#include <linux/kernel.h>
+#include <mach/init.h>
+
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
+static const struct uniphier_board_data ph1_sld3_data = {
+	.dram_ch0_base	= 0x80000000,
+	.dram_ch0_size	= 0x20000000,
+	.dram_ch0_width	= 32,
+	.dram_ch1_base	= 0xc0000000,
+	.dram_ch1_size	= 0x20000000,
+	.dram_ch1_width	= 16,
+	.dram_ch2_base	= 0xc0000000,
+	.dram_ch2_size	= 0x10000000,
+	.dram_ch2_width	= 16,
+	.dram_freq	= 1600,
+};
+#endif
+
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
+static const struct uniphier_board_data ph1_ld4_data = {
+	.dram_ch0_base	= 0x80000000,
+	.dram_ch0_size	= 0x10000000,
+	.dram_ch0_width	= 16,
+	.dram_ch1_base	= 0x90000000,
+	.dram_ch1_size	= 0x10000000,
+	.dram_ch1_width	= 16,
+	.dram_freq	= 1600,
+};
+#endif
+
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
+static const struct uniphier_board_data ph1_pro4_data = {
+	.dram_ch0_base	= 0x80000000,
+	.dram_ch0_size	= 0x20000000,
+	.dram_ch0_width	= 32,
+	.dram_ch1_base	= 0xa0000000,
+	.dram_ch1_size	= 0x20000000,
+	.dram_ch1_width	= 32,
+	.dram_freq	= 1600,
+};
+#endif
+
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
+static const struct uniphier_board_data ph1_sld8_data = {
+	.dram_ch0_base	= 0x80000000,
+	.dram_ch0_size	= 0x10000000,
+	.dram_ch0_width	= 16,
+	.dram_ch1_base	= 0x90000000,
+	.dram_ch1_size	= 0x10000000,
+	.dram_ch1_width	= 16,
+	.dram_freq	= 1333,
+};
+#endif
+
+struct uniphier_board_id {
+	const char *compatible;
+	const struct uniphier_board_data *param;
+};
+
+static const struct uniphier_board_id uniphier_boards[] = {
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
+	{ "socionext,ph1-sld3", &ph1_sld3_data, },
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
+	{ "socionext,ph1-ld4", &ph1_ld4_data, },
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
+	{ "socionext,ph1-pro4", &ph1_pro4_data, },
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
+	{ "socionext,ph1-sld8", &ph1_sld8_data, },
+#endif
+};
+
+const struct uniphier_board_data *uniphier_get_board_param(const void *fdt)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) {
+		if (!fdt_node_check_compatible(fdt, 0,
+					       uniphier_boards[i].compatible))
+			return uniphier_boards[i].param;
+	}
+
+	return NULL;
+}