diff options
| author | Simon Glass <sjg@chromium.org> | 2015-04-14 21:03:23 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2015-05-13 09:24:07 -0700 |
| commit | db043785bbceb708a353593098d8af01cab35d05 (patch) | |
| tree | 2bbb024c4814baac8a1750f14ecb648b1cb3e917 /arch/arm/mach-tegra/pwm.c | |
| parent | 1c82c2f60a6f5a5c16f1ea7144da479e78760e06 (diff) | |
| download | talos-obmc-uboot-db043785bbceb708a353593098d8af01cab35d05.tar.gz talos-obmc-uboot-db043785bbceb708a353593098d8af01cab35d05.zip | |
tegra: pwm: Allow the clock rate to be left as is
When enabling a PWM, allow the existing clock rate and source to stand
unchanged.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pwm.c')
| -rw-r--r-- | arch/arm/mach-tegra/pwm.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/pwm.c b/arch/arm/mach-tegra/pwm.c index 8664200430..1c38fc1784 100644 --- a/arch/arm/mach-tegra/pwm.c +++ b/arch/arm/mach-tegra/pwm.c @@ -24,7 +24,10 @@ void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider) assert(channel < PWM_NUM_CHANNELS); /* TODO: Can we use clock_adjust_periph_pll_div() here? */ - clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, rate); + if (rate) { + clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, + rate); + } reg = PWM_ENABLE_MASK; reg |= pulse_width << PWM_WIDTH_SHIFT; |
