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| author | Thomas Abraham <thomas.ab@samsung.com> | 2015-08-03 17:58:00 +0530 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2015-08-17 13:06:52 +0900 |
| commit | 77b55e8cfcee9ce1a973bf4dad3e160dd0be01f3 (patch) | |
| tree | 0ec9071faf7ea93eca773777c989f1da65aada24 /arch/arm/mach-exynos/include/mach/tzpc.h | |
| parent | 632093b566569329bc6e5b0893bdca01de905314 (diff) | |
| download | talos-obmc-uboot-77b55e8cfcee9ce1a973bf4dad3e160dd0be01f3.tar.gz talos-obmc-uboot-77b55e8cfcee9ce1a973bf4dad3e160dd0be01f3.zip | |
ARM: exynos: move SoC sources to mach-exynos
Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow
reuse of existing code for ARMv8 based Exynos platforms.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include/mach/tzpc.h')
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/tzpc.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/tzpc.h b/arch/arm/mach-exynos/include/mach/tzpc.h new file mode 100644 index 0000000000..0a4be23911 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/tzpc.h @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2012 Samsung Electronics + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __TZPC_H_ +#define __TZPC_H_ + +#ifndef __ASSEMBLY__ +struct exynos_tzpc { + unsigned int r0size; + char res1[0x7FC]; + unsigned int decprot0stat; + unsigned int decprot0set; + unsigned int decprot0clr; + unsigned int decprot1stat; + unsigned int decprot1set; + unsigned int decprot1clr; + unsigned int decprot2stat; + unsigned int decprot2set; + unsigned int decprot2clr; + unsigned int decprot3stat; + unsigned int decprot3set; + unsigned int decprot3clr; + char res2[0x7B0]; + unsigned int periphid0; + unsigned int periphid1; + unsigned int periphid2; + unsigned int periphid3; + unsigned int pcellid0; + unsigned int pcellid1; + unsigned int pcellid2; + unsigned int pcellid3; +}; + +#define EXYNOS4_NR_TZPC_BANKS 6 +#define EXYNOS5_NR_TZPC_BANKS 10 + +/* TZPC : Register Offsets */ +#define TZPC_BASE_OFFSET 0x10000 + +/* + * TZPC Register Value : + * R0SIZE: 0x0 : Size of secured ram + */ +#define R0SIZE 0x0 + +/* + * TZPC Decode Protection Register Value : + * DECPROTXSET: 0xFF : Set Decode region to non-secure + */ +#define DECPROTXSET 0xFF +void tzpc_init(void); + +#endif + +#endif |
