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authorNishanth Menon <nm@ti.com>2016-03-09 17:39:56 +0530
committerTom Rini <trini@konsulko.com>2016-03-15 21:30:19 -0400
commit3eb80d10c7715d427808908b259646f1df781264 (patch)
treee0263281b1ee8411779699cbff668af16521e927 /arch/arm/lib
parentd28a86c07adc4b0288b86084db074c327cde2731 (diff)
downloadtalos-obmc-uboot-3eb80d10c7715d427808908b259646f1df781264.tar.gz
talos-obmc-uboot-3eb80d10c7715d427808908b259646f1df781264.zip
ARM: DRA7: DDR: Enable SR in Power Management Control
If EMIF is idle for certain amount of DDR cycles, EMIF will put the DDR in self refresh mode to save power if EMIF_PWR_MGMT_CTRL register is programmed. And also before entering suspend-resume ddr needs to be put in self-refresh. Linux kernel does not program this register before entering suspend and relies on u-boot setting. So configuring it in u-boot. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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