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authorAlexander Graf <agraf@suse.de>2016-03-16 15:41:20 +0100
committerTom Rini <trini@konsulko.com>2016-03-27 09:12:16 -0400
commit53eb45ef40b696c0e2d9d5bf4b691a97e8d8ea64 (patch)
treeff22f07aabcbfcd84e7006e5406b227b018abb89 /arch/arm/include
parent8cac14719d5bc6a71cd249b349331fe5f2ffa03f (diff)
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arm64: Add 32bit arm compatible dcache definitions
We want to be able to reuse device drivers from 32bit code, so let's add definitions for all the dcache options that 32bit code has. While at it, fix up the DCACHE_OFF configuration. That was setting the bits to declare a PTE a PTE and left the MAIR index bit at 0. Drop the useless bits and make the index explicit. Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/system.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index ac1173d189..832c1dbd1c 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -26,8 +26,12 @@ u64 get_page_table_size(void);
#define MMU_SECTION_SHIFT 21
#define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)
+/* These constants need to be synced to the MT_ types in asm/armv8/mmu.h */
enum dcache_option {
- DCACHE_OFF = 0x3,
+ DCACHE_OFF = 0 << 2,
+ DCACHE_WRITETHROUGH = 3 << 2,
+ DCACHE_WRITEBACK = 4 << 2,
+ DCACHE_WRITEALLOC = 4 << 2,
};
#define isb() \
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