diff options
| author | Tom Rini <trini@konsulko.com> | 2016-04-13 07:19:50 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-04-13 07:19:50 -0400 |
| commit | 814013253fd4cf932d0fb32f7043f09a2a748d9a (patch) | |
| tree | 9d9f84d8b469beb5e8aade98c503db4ce51bb8d8 /arch/arm/include/asm | |
| parent | 39fbd987164336adc2ff7e5ab7a4268b8dcdee92 (diff) | |
| parent | 59c9e9b408014025cfa158a98aeafbcf33aa2d3d (diff) | |
| download | talos-obmc-uboot-814013253fd4cf932d0fb32f7043f09a2a748d9a.tar.gz talos-obmc-uboot-814013253fd4cf932d0fb32f7043f09a2a748d9a.zip | |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-imx/cpu.h | 1 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx27/imx-regs.h | 6 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 1 |
3 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index 8a75902ee5..7c63c13d7b 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -21,6 +21,7 @@ #define MXC_CPU_MX6D 0x67 #define MXC_CPU_MX6DP 0x68 #define MXC_CPU_MX6QP 0x69 +#define MXC_CPU_MX7S 0x71 /* dummy ID */ #define MXC_CPU_MX7D 0x72 #define MXC_CPU_VF610 0xF6 /* dummy ID */ diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index baf1d29cc3..40b76d26f6 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -106,9 +106,9 @@ struct esdramc_regs { /* Watchdog Registers*/ struct wdog_regs { - u32 wcr; - u32 wsr; - u32 wstr; + u16 wcr; + u16 wsr; + u16 wstr; }; /* PLL registers */ diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index f3c26dc6e6..53488bef55 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -162,6 +162,7 @@ #endif #define UART1_BASE (ATZ1_BASE_ADDR + 0x20000) #define ESAI1_BASE_ADDR (ATZ1_BASE_ADDR + 0x24000) +#define UART8_BASE (ATZ1_BASE_ADDR + 0x24000) #define SSI1_BASE_ADDR (ATZ1_BASE_ADDR + 0x28000) #define SSI2_BASE_ADDR (ATZ1_BASE_ADDR + 0x2C000) #define SSI3_BASE_ADDR (ATZ1_BASE_ADDR + 0x30000) |
