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author | Dan Murphy <dmurphy@ti.com> | 2013-08-26 08:54:50 -0500 |
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committer | Marek Vasut <marex@denx.de> | 2013-10-20 23:42:39 +0200 |
commit | d861a333da84dd7ab70e975171159c37f7d06939 (patch) | |
tree | 32b1f7efee223c98f73aa78d6d6a9003af32545c /arch/arm/include/asm/omap_common.h | |
parent | 1bd435bc70a03f150900be4ac70a7bc8bfa4b438 (diff) | |
download | talos-obmc-uboot-d861a333da84dd7ab70e975171159c37f7d06939.tar.gz talos-obmc-uboot-d861a333da84dd7ab70e975171159c37f7d06939.zip |
ARM: OMAP5: Add registers and defines for USBOTG SS
Add the prcm registers and the bit definitions to enable the
USB SS port of the OMAP5 device.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Diffstat (limited to 'arch/arm/include/asm/omap_common.h')
-rw-r--r-- | arch/arm/include/asm/omap_common.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 3a998cc10c..bea1835e6b 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -143,6 +143,7 @@ struct prcm_regs { u32 cm_div_m2_dpll_unipro; u32 cm_ssc_deltamstep_dpll_unipro; u32 cm_ssc_modfreqdiv_dpll_unipro; + u32 cm_coreaon_usb_phy_core_clkctrl; /* cm2.core */ u32 cm_coreaon_bandgap_clkctrl; @@ -226,6 +227,8 @@ struct prcm_regs { u32 cm_l3init_p1500_clkctrl; u32 cm_l3init_fsusb_clkctrl; u32 cm_l3init_ocp2scp1_clkctrl; + u32 cm_l3init_ocp2scp3_clkctrl; + u32 cm_l3init_usb_otg_ss_clkctrl; u32 prm_irqstatus_mpu_2; @@ -348,6 +351,7 @@ struct omap_sys_ctrl_regs { u32 control_core_mac_id_1_lo; u32 control_core_mac_id_1_hi; u32 control_std_fuse_opp_vdd_mpu_2; + u32 control_phy_power_usb; u32 control_core_mmr_lock1; u32 control_core_mmr_lock2; u32 control_core_mmr_lock3; |