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authorYork Sun <yorksun@freescale.com>2015-01-06 13:18:49 -0800
committerYork Sun <yorksun@freescale.com>2015-02-24 13:09:14 -0800
commitb87e6f88e9218da3de371bb6cc8a34924153178e (patch)
treefe1c672d5af630646b8c1193b9f00c2132e857f8 /arch/arm/include/asm/global_data.h
parent49fd1f3f265efc00d61effa995bd6a733bf273d8 (diff)
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armv8/fsl-lsch3: Add support for second DDR clock
FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for general DDR controlers, and another clock for DP-DDR. DDR driver needs to change to support multiple clocks. Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/global_data.h')
-rw-r--r--arch/arm/include/asm/global_data.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 438f128326..bb24f33d0d 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -48,6 +48,9 @@ struct arch_global_data {
#ifdef CONFIG_OMAP
struct omap_boot_parameters omap_boot_params;
#endif
+#ifdef CONFIG_FSL_LSCH3
+ unsigned long mem2_clk;
+#endif
};
#include <asm-generic/global_data.h>
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