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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-23 18:06:40 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-11-10 15:03:48 +0100 |
| commit | 62e92077a8936e60087d55683538ee386cc673aa (patch) | |
| tree | 98bf9f9796ab466ad1bff97c7672d5c3159526d3 /arch/arm/include/asm/cache.h | |
| parent | bf104ffa2594e5bf14ef2d5ac2711084c763ef77 (diff) | |
| download | talos-obmc-uboot-62e92077a8936e60087d55683538ee386cc673aa.tar.gz talos-obmc-uboot-62e92077a8936e60087d55683538ee386cc673aa.zip | |
arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD
When building a Thumb-1-only target with CONFIG_SYS_THUMB_BUILD,
some files fail to build, most of the time because they include
mcr instructions, which only exist for Thumb-2.
This patch introduces a Kconfig option CONFIG_THUMB2 and uses
it to select between Thumb-2 and ARM mode for the aforementioned
files.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/include/asm/cache.h')
| -rw-r--r-- | arch/arm/include/asm/cache.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index a836e9f2ab..1f63127bdc 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -16,6 +16,9 @@ /* * Invalidate L2 Cache using co-proc instruction */ +#ifdef CONFIG_SYS_THUMB_BUILD +void invalidate_l2_cache(void); +#else static inline void invalidate_l2_cache(void) { unsigned int val=0; @@ -24,6 +27,7 @@ static inline void invalidate_l2_cache(void) : : "r" (val) : "cc"); isb(); } +#endif void l2_cache_enable(void); void l2_cache_disable(void); |
