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authorMichal Simek <michal.simek@xilinx.com>2015-01-15 10:01:51 +0100
committerMichal Simek <michal.simek@xilinx.com>2015-03-02 18:41:54 +0100
commit84c7204bd18a0051a353c7a6f65a5666e1af9501 (patch)
treef69f35c2a593be6a696cfbbdd38f537b12f65a9c /arch/arm/include/asm/arch-zynqmp
parent1606b34aa50804227806971dbb6b82ea0bf81f55 (diff)
downloadtalos-obmc-uboot-84c7204bd18a0051a353c7a6f65a5666e1af9501.tar.gz
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arm64: Add Xilinx ZynqMP support
Add basic Xilinx ZynqMP arm64 support. Serial and SD is supported. It supports emulation platfrom ep108 and QEMU. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include/asm/arch-zynqmp')
-rw-r--r--arch/arm/include/asm/arch-zynqmp/clk.h13
-rw-r--r--arch/arm/include/asm/arch-zynqmp/hardware.h52
-rw-r--r--arch/arm/include/asm/arch-zynqmp/sys_proto.h15
3 files changed, 80 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-zynqmp/clk.h b/arch/arm/include/asm/arch-zynqmp/clk.h
new file mode 100644
index 0000000000..d55bc31c43
--- /dev/null
+++ b/arch/arm/include/asm/arch-zynqmp/clk.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2014 - 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_CLK_H_
+#define _ASM_ARCH_CLK_H_
+
+unsigned long get_uart_clk(int dev_id);
+
+#endif /* _ASM_ARCH_CLK_H_ */
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
new file mode 100644
index 0000000000..97fb49a2a7
--- /dev/null
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2014 - 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_HARDWARE_H
+#define _ASM_ARCH_HARDWARE_H
+
+#define ZYNQ_SERIAL_BASEADDR0 0xFF000000
+#define ZYNQ_SERIAL_BASEADDR1 0xFF001000
+
+#define ZYNQ_SDHCI_BASEADDR0 0xFF160000
+#define ZYNQ_SDHCI_BASEADDR1 0xFF170000
+
+#define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000
+#define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000
+
+struct crlapb_regs {
+ u32 reserved0[74];
+ u32 timestamp_ref_ctrl; /* 0x128 */
+ u32 reserved0_1[53];
+ u32 boot_mode; /* 0x200 */
+ u32 reserved1[26];
+};
+
+#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR)
+
+#define ZYNQMP_IOU_SCNTR 0xFF250000
+#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1
+#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2
+
+struct iou_scntr {
+ u32 counter_control_register;
+ u32 reserved0[7];
+ u32 base_frequency_id_register;
+};
+
+#define iou_scntr ((struct iou_scntr *)ZYNQMP_IOU_SCNTR)
+
+/* Bootmode setting values */
+#define BOOT_MODES_MASK 0x0000000F
+#define SD_MODE 0x00000005
+#define JTAG_MODE 0x00000000
+
+/* Board version value */
+#define ZYNQMP_CSU_VERSION_SILICON 0x0
+#define ZYNQMP_CSU_VERSION_EP108 0x1
+#define ZYNQMP_CSU_VERSION_QEMU 0x3
+
+#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
new file mode 100644
index 0000000000..d8e0ba1588
--- /dev/null
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2014 - 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SYS_PROTO_H
+#define _ASM_ARCH_SYS_PROTO_H
+
+int zynq_sdhci_init(unsigned long regbase);
+
+unsigned int zynqmp_get_silicon_version(void);
+
+#endif /* _ASM_ARCH_SYS_PROTO_H */
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