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| author | Tom Rini <trini@ti.com> | 2014-10-23 14:05:34 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-10-23 14:05:34 -0400 |
| commit | 03a3536c7b7f2902932606da9248c6f08318174a (patch) | |
| tree | 414815bd812360c88c338416f5bb6c67ed7ba75d /arch/arm/include/asm/arch-tegra20 | |
| parent | 7bfd5ee1170eca10d26858b6b2ed36317cc686fd (diff) | |
| parent | 9aafef4f360616a507578b8868092f096b093aa9 (diff) | |
| download | talos-obmc-uboot-03a3536c7b7f2902932606da9248c6f08318174a.tar.gz talos-obmc-uboot-03a3536c7b7f2902932606da9248c6f08318174a.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Diffstat (limited to 'arch/arm/include/asm/arch-tegra20')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra20/mc.h | 36 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra20/tegra.h | 1 |
2 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra20/mc.h b/arch/arm/include/asm/arch-tegra20/mc.h new file mode 100644 index 0000000000..9c6e3ffb6f --- /dev/null +++ b/arch/arm/include/asm/arch-tegra20/mc.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2014 + * NVIDIA Corporation <www.nvidia.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _TEGRA20_MC_H_ +#define _TEGRA20_MC_H_ + +/** + * Defines the memory controller registers we need/care about + */ +struct mc_ctlr { + u32 reserved0[3]; /* offset 0x00 - 0x08 */ + u32 mc_emem_cfg; /* offset 0x0C */ + u32 mc_emem_adr_cfg; /* offset 0x10 */ + u32 mc_emem_arb_cfg0; /* offset 0x14 */ + u32 mc_emem_arb_cfg1; /* offset 0x18 */ + u32 mc_emem_arb_cfg2; /* offset 0x1C */ + u32 reserved1; /* offset 0x20 */ + u32 mc_gart_cfg; /* offset 0x24 */ + u32 mc_gart_entry_addr; /* offset 0x28 */ + u32 mc_gart_entry_data; /* offset 0x2C */ + u32 mc_gart_error_req; /* offset 0x30 */ + u32 mc_gart_error_addr; /* offset 0x34 */ + u32 reserved2; /* offset 0x38 */ + u32 mc_timeout_ctrl; /* offset 0x3C */ + u32 reserved3[6]; /* offset 0x40 - 0x54 */ + u32 mc_decerr_emem_others_status; /* offset 0x58 */ + u32 mc_decerr_emem_others_adr; /* offset 0x5C */ + u32 reserved4[40]; /* offset 0x60 - 0xFC */ + u32 reserved5[93]; /* offset 0x100 - 0x270 */ +}; + +#endif /* _TEGRA20_MC_H_ */ diff --git a/arch/arm/include/asm/arch-tegra20/tegra.h b/arch/arm/include/asm/arch-tegra20/tegra.h index 18856ac372..22774abb93 100644 --- a/arch/arm/include/asm/arch-tegra20/tegra.h +++ b/arch/arm/include/asm/arch-tegra20/tegra.h @@ -9,6 +9,7 @@ #define _TEGRA20_H_ #define NV_PA_SDRAM_BASE 0x00000000 +#define NV_PA_MC_BASE 0x7000F000 #include <asm/arch-tegra/tegra.h> |
