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authorChin Liang See <clsee@altera.com>2013-08-07 10:08:03 -0500
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-09-06 12:09:06 +0200
commit68e1747f9c0506159e8ecc9a4feb58e9c65a7b39 (patch)
treec4b1a1ba9d50e05a3839b51a8f4cbeeb6762f3fd /arch/arm/include/asm/arch-socfpga
parent31ad864e47f03288bf1d4232913b38ddb624345c (diff)
downloadtalos-obmc-uboot-68e1747f9c0506159e8ecc9a4feb58e9c65a7b39.tar.gz
talos-obmc-uboot-68e1747f9c0506159e8ecc9a4feb58e9c65a7b39.zip
socfpga: Creating driver for Reset Manager
Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/include/asm/arch-socfpga')
-rw-r--r--arch/arm/include/asm/arch-socfpga/reset_manager.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h
index 13d7357702..3e95476828 100644
--- a/arch/arm/include/asm/arch-socfpga/reset_manager.h
+++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h
@@ -11,16 +11,20 @@ void reset_cpu(ulong addr);
void reset_deassert_peripherals_handoff(void);
struct socfpga_reset_manager {
- u32 padding1;
+ u32 status;
u32 ctrl;
- u32 padding2;
- u32 padding3;
+ u32 counts;
+ u32 padding1;
u32 mpu_mod_reset;
u32 per_mod_reset;
u32 per2_mod_reset;
u32 brg_mod_reset;
};
+#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
+#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
+#else
#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
+#endif
#endif /* _RESET_MANAGER_H_ */
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