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authorStefan Roese <sr@denx.de>2014-11-07 13:50:30 +0100
committerMarek Vasut <marex@denx.de>2014-11-07 16:09:10 +0100
commita877bec3ecd7961211a59b2c130e055e0f771976 (patch)
treeb4a94f10ecdcb027435a470c2c6232d9825ac39e /arch/arm/include/asm/arch-socfpga/reset_manager.h
parentd2bb937db911b19ed38dd4e5a30b5bf4f2e5a951 (diff)
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arm: socfpga: Add socfpga_spim_enable() to reset_manager.c
This function will be needed by the upcoming Designware master SPI driver. As the SPI master controller is held in reset by the current Preloader implementation. So we need to release the reset for the driver to communicate with the controller. This function is called from arch_early_init_r() if the SPI driver is enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-socfpga/reset_manager.h')
-rw-r--r--arch/arm/include/asm/arch-socfpga/reset_manager.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h
index 1857b80b3e..034135bff4 100644
--- a/arch/arm/include/asm/arch-socfpga/reset_manager.h
+++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h
@@ -14,6 +14,7 @@ void socfpga_bridges_reset(int enable);
void socfpga_emac_reset(int enable);
void socfpga_watchdog_reset(void);
+void socfpga_spim_enable(void);
struct socfpga_reset_manager {
u32 status;
@@ -35,5 +36,7 @@ struct socfpga_reset_manager {
#define RSTMGR_PERMODRST_EMAC0_LSB 0
#define RSTMGR_PERMODRST_EMAC1_LSB 1
#define RSTMGR_PERMODRST_L4WD0_LSB 6
+#define RSTMGR_PERMODRST_SPIM0_LSB 18
+#define RSTMGR_PERMODRST_SPIM1_LSB 19
#endif /* _RESET_MANAGER_H_ */
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