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| author | Kishon Vijay Abraham I <kishon@ti.com> | 2015-08-10 16:52:55 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-28 12:33:19 -0400 |
| commit | 7beaf8b6903f2ef4ab8d1d36ee4b0ea4e8611ffd (patch) | |
| tree | 9c0b7d780e70fb5b7f4a283033c1f51f01d39d60 /arch/arm/include/asm/arch-omap5 | |
| parent | 8af1be7678c1fd9bc03b28f0756c586fb3d47d29 (diff) | |
| download | talos-obmc-uboot-7beaf8b6903f2ef4ab8d1d36ee4b0ea4e8611ffd.tar.gz talos-obmc-uboot-7beaf8b6903f2ef4ab8d1d36ee4b0ea4e8611ffd.zip | |
ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2
Enabled clocks for the second dwc3 controller and second USB PHY present in
DRA7.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5')
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index f8e5630bcb..38d50d614f 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -172,6 +172,9 @@ /* CM_COREAON_USB_PHY_CORE_CLKCTRL */ #define USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8) +/* CM_COREAON_L3INIT_60M_GFCLK_CLKCTRL */ +#define L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK (1 << 8) + /* CM_L3INIT_USB_OTG_SS_CLKCTRL */ #define OTG_SS_CLKCTRL_MODULEMODE_HW (1 << 0) #define OPTFCLKEN_REFCLK960M (1 << 8) |
