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| author | Lubomir Popov <lpopov@mm-sol.com> | 2013-05-15 04:41:01 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-06-10 08:54:46 -0400 |
| commit | ee28edac4322602685ea12dc46edad1ec6b60487 (patch) | |
| tree | 344057b8fb5c0ff78e35989c60a9b0f0bb28ba2a /arch/arm/include/asm/arch-omap5/clock.h | |
| parent | 960187ffa125b3938fec4b827bd9e8c04a204af8 (diff) | |
| download | talos-obmc-uboot-ee28edac4322602685ea12dc46edad1ec6b60487.tar.gz talos-obmc-uboot-ee28edac4322602685ea12dc46edad1ec6b60487.zip | |
OMAP5: Enable access to auxclk registers
auxclk0 and auxclk1 are utilized on some OMAP5 boards.
Define the infrastructure needed for accessing them
without using magic numbers.
Also remove unrelated TPS62361 defines from clocks.h
Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5/clock.h')
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 1affa4f666..4d2765d878 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -281,6 +281,11 @@ #define TPS62361_BASE_VOLT_MV 500 #define TPS62361_VSEL0_GPIO 7 +/* Defines for DPLL setup */ +#define DPLL_LOCKED_FREQ_TOLERANCE_0 0 +#define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ 500 +#define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ 1000 + #define DPLL_NO_LOCK 0 #define DPLL_LOCK 1 @@ -298,4 +303,17 @@ #endif #define V_SCLK V_OSCK + +/* AUXCLKx reg fields */ +#define AUXCLK_ENABLE_MASK (1 << 8) +#define AUXCLK_SRCSELECT_SHIFT 1 +#define AUXCLK_SRCSELECT_MASK (3 << 1) +#define AUXCLK_CLKDIV_SHIFT 16 +#define AUXCLK_CLKDIV_MASK (0xF << 16) + +#define AUXCLK_SRCSELECT_SYS_CLK 0 +#define AUXCLK_SRCSELECT_CORE_DPLL 1 +#define AUXCLK_SRCSELECT_PER_DPLL 2 +#define AUXCLK_SRCSELECT_ALTERNATE 3 + #endif /* _CLOCKS_OMAP5_H_ */ |
