summaryrefslogtreecommitdiffstats
path: root/arch/arm/include/asm/arch-omap4
diff options
context:
space:
mode:
authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-09-04 14:06:56 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-09-04 14:06:56 +0200
commite62d5fb0da76ef168e90cae9bbbda80349aaf137 (patch)
treeb5c338d17f0633b7ec2e27d4d8b82dcf153a5281 /arch/arm/include/asm/arch-omap4
parent4eef93da262048eb1118e726b3ec5b8ebd3c6c91 (diff)
parent901ce27c6f018992b7dd6c08d3c98cf217cc4c96 (diff)
downloadtalos-obmc-uboot-e62d5fb0da76ef168e90cae9bbbda80349aaf137.tar.gz
talos-obmc-uboot-e62d5fb0da76ef168e90cae9bbbda80349aaf137.zip
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/include/asm/arch-omap4')
-rw-r--r--arch/arm/include/asm/arch-omap4/clock.h7
-rw-r--r--arch/arm/include/asm/arch-omap4/omap.h1
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-omap4/clock.h b/arch/arm/include/asm/arch-omap4/clock.h
index b2e03d6e1e..f3a682a197 100644
--- a/arch/arm/include/asm/arch-omap4/clock.h
+++ b/arch/arm/include/asm/arch-omap4/clock.h
@@ -149,11 +149,16 @@
/* PRM_VC_VAL_BYPASS */
#define PRM_VC_I2C_CHANNEL_FREQ_KHZ 400
-/* SMPS */
+/* PMIC */
#define SMPS_I2C_SLAVE_ADDR 0x12
+/* TWL6030 SMPS */
#define SMPS_REG_ADDR_VCORE1 0x55
#define SMPS_REG_ADDR_VCORE2 0x5B
#define SMPS_REG_ADDR_VCORE3 0x61
+/* TWL6032 SMPS */
+#define SMPS_REG_ADDR_SMPS1 0x55
+#define SMPS_REG_ADDR_SMPS2 0x5B
+#define SMPS_REG_ADDR_SMPS5 0x49
#define PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV 607700
#define PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV 709000
diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 3823a37f2f..9129c0dd7c 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -41,6 +41,7 @@
#define OMAP4_CONTROL_ID_CODE_ES2_3 0x6B95C02F
#define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F
#define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F
+#define OMAP4470_CONTROL_ID_CODE_ES1_0 0x0B97502F
/* UART */
#define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000)
OpenPOWER on IntegriCloud