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| author | Peter Korsgaard <peter.korsgaard@barco.com> | 2012-10-18 01:21:12 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-25 11:31:38 -0700 |
| commit | c00f69dbcd4a5e59d381274743b78e62485c5e4a (patch) | |
| tree | 951c031b10215d5dec5edfb81fb8e0a8520d2e30 /arch/arm/include/asm/arch-am33xx/ddr_defs.h | |
| parent | 7f26a5a26f2c24a29a120702f2607e99ac8e1fef (diff) | |
| download | talos-obmc-uboot-c00f69dbcd4a5e59d381274743b78e62485c5e4a.tar.gz talos-obmc-uboot-c00f69dbcd4a5e59d381274743b78e62485c5e4a.zip | |
am33xx: support board specific ddr settings
Move the hardcoded ddr2/ddr3 settings for the ti boards to board code,
so other boards can use different types/timings.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Make apply with rtc32k_enable() in the file]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx/ddr_defs.h')
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/ddr_defs.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index 6b22c45f77..40a13e9d8d 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -29,6 +29,7 @@ #define PHY_DLL_LOCK_DIFF 0x0 #define DDR_CKE_CTRL_NORMAL 0x1 +/* Micron MT47H128M16RT-25E */ #define DDR2_EMIF_READ_LATENCY 0x100005 /* Enable Dynamic Power Down */ #define DDR2_EMIF_TIM1 0x0666B3C9 #define DDR2_EMIF_TIM2 0x243631CA @@ -189,6 +190,8 @@ struct ddr_ctrl { unsigned int ddrckectrl; }; -void config_ddr(short ddr_type); +void config_ddr(unsigned int pll, unsigned int ioctrl, + const struct ddr_data *data, const struct cmd_control *ctrl, + const struct emif_regs *regs); #endif /* _DDR_DEFS_H */ |
