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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2014-04-29 10:15:46 -0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-05-09 15:10:53 +0200 |
| commit | 98d2cffd23503225108e0ceb36dbe6b1bbd93ed6 (patch) | |
| tree | 2607681c73e535c3993c9f26d333d2ea3a87c87b /arch/arm/imx-common | |
| parent | 234d89dac61a4f57a0f7cb136a6c442f37a6c9b8 (diff) | |
| download | talos-obmc-uboot-98d2cffd23503225108e0ceb36dbe6b1bbd93ed6.tar.gz talos-obmc-uboot-98d2cffd23503225108e0ceb36dbe6b1bbd93ed6.zip | |
iomux-v3: Add support for mx6sl LVE bit
On mx6sl there is a LVE (Low Voltage Enable) bit in the IOMUXC_SW_PAD_CTL
register that can enable or disable low voltage on the pad.
LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the
calculation easier we can define it as a flag in bit 1, since this bit is unused.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
Diffstat (limited to 'arch/arm/imx-common')
| -rw-r--r-- | arch/arm/imx-common/iomux-v3.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c index b59b802830..6e46ea8dcd 100644 --- a/arch/arm/imx-common/iomux-v3.c +++ b/arch/arm/imx-common/iomux-v3.c @@ -30,6 +30,14 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) (pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT; u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; +#if defined CONFIG_MX6SL + /* Check whether LVE bit needs to be set */ + if (pad_ctrl & PAD_CTL_LVE) { + pad_ctrl &= ~PAD_CTL_LVE; + pad_ctrl |= PAD_CTL_LVE_BIT; + } +#endif + if (mux_ctrl_ofs) __raw_writel(mux_mode, base + mux_ctrl_ofs); |
