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| author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-09-27 10:19:58 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:10 -0700 |
| commit | 833b6435de3e8cf5b06ba81cb1b2b50e044269ff (patch) | |
| tree | 850355b18c47bcf2b56a12fe4424f067e0491460 /arch/arm/imx-common/timer.c | |
| parent | e7bed5c2b30c894666e43b68a3d7b8e8f91da50d (diff) | |
| download | talos-obmc-uboot-833b6435de3e8cf5b06ba81cb1b2b50e044269ff.tar.gz talos-obmc-uboot-833b6435de3e8cf5b06ba81cb1b2b50e044269ff.zip | |
mx5/6: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'arch/arm/imx-common/timer.c')
| -rw-r--r-- | arch/arm/imx-common/timer.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c index e2725e1a64..b021903d9b 100644 --- a/arch/arm/imx-common/timer.c +++ b/arch/arm/imx-common/timer.c @@ -27,6 +27,7 @@ #include <asm/io.h> #include <div64.h> #include <asm/arch/imx-regs.h> +#include <asm/arch/clock.h> /* General purpose timers registers */ struct mxc_gpt { @@ -44,7 +45,6 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR; #define GPTCR_FRR (1 << 9) /* Freerun / restart */ #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */ #define GPTCR_TEN 1 /* Timer enable */ -#define CLK_32KHZ 32768 /* 32Khz input */ DECLARE_GLOBAL_DATA_PTR; @@ -54,14 +54,14 @@ DECLARE_GLOBAL_DATA_PTR; static inline unsigned long long tick_to_time(unsigned long long tick) { tick *= CONFIG_SYS_HZ; - do_div(tick, CLK_32KHZ); + do_div(tick, MXC_CLK32); return tick; } static inline unsigned long long us_to_tick(unsigned long long usec) { - usec = usec * CLK_32KHZ + 999999; + usec = usec * MXC_CLK32 + 999999; do_div(usec, 1000000); return usec; @@ -86,7 +86,7 @@ int timer_init(void) __raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control); val = __raw_readl(&cur_gpt->counter); - lastinc = val / (CLK_32KHZ / CONFIG_SYS_HZ); + lastinc = val / (MXC_CLK32 / CONFIG_SYS_HZ); timestamp = 0; return 0; @@ -114,7 +114,7 @@ ulong get_timer_masked(void) { /* * get_ticks() returns a long long (64 bit), it wraps in - * 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ + * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in * 5 * 10^6 days - long enough. */ @@ -145,5 +145,5 @@ void __udelay(unsigned long usec) */ ulong get_tbclk(void) { - return CLK_32KHZ; + return MXC_CLK32; } |
