diff options
author | Stephen Warren <swarren@wwwdotorg.org> | 2012-08-05 16:07:21 +0000 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:21 +0200 |
commit | efad6cf8818620b0d85405df2b810760b62acbb8 (patch) | |
tree | 45fa8ee97e49c985752e31cc7dfe84db4f6cf18d /arch/arm/cpu | |
parent | 86c632651d317fbb9de92489b7a5febece3c4436 (diff) | |
download | talos-obmc-uboot-efad6cf8818620b0d85405df2b810760b62acbb8.tar.gz talos-obmc-uboot-efad6cf8818620b0d85405df2b810760b62acbb8.zip |
ARM: add basic support for the Broadcom BCM2835 SoC
This SoC is used in the Raspberry Pi, for example.
For more details, see:
http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf.
Initial support is enough to boot to a serial console, execute a minimal
set of U-Boot commands, download data over a serial port, and boot a
Linux kernel. No storage or network drivers are implemented.
GPIO driver originally by Vikram Narayanan <vikram186@gmail.com>
with many fixes from myself.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/arm1176/bcm2835/Makefile | 37 | ||||
-rw-r--r-- | arch/arm/cpu/arm1176/bcm2835/config.mk | 19 | ||||
-rw-r--r-- | arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S | 19 | ||||
-rw-r--r-- | arch/arm/cpu/arm1176/bcm2835/reset.c | 35 | ||||
-rw-r--r-- | arch/arm/cpu/arm1176/bcm2835/timer.c | 55 |
5 files changed, 165 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile b/arch/arm/cpu/arm1176/bcm2835/Makefile new file mode 100644 index 0000000000..4ea6d6b89f --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/Makefile @@ -0,0 +1,37 @@ +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +SOBJS := lowlevel_init.o +COBJS := reset.o timer.o + +SRCS := $(SOBJS:.o=.c) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/arm1176/bcm2835/config.mk b/arch/arm/cpu/arm1176/bcm2835/config.mk new file mode 100644 index 0000000000..b87ce244c3 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/config.mk @@ -0,0 +1,19 @@ +# +# (C) Copyright 2012 Stephen Warren +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# Don't attempt to override the target CPU/ABI options; +# the Raspberry Pi toolchain does the right thing by default. +PLATFORM_RELFLAGS := $(filter-out -msoft-float,$(PLATFORM_RELFLAGS)) +PLATFORM_CPPFLAGS := $(filter-out -march=armv5t,$(PLATFORM_CPPFLAGS)) diff --git a/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S b/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S new file mode 100644 index 0000000000..c7b0843281 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S @@ -0,0 +1,19 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +.globl lowlevel_init +lowlevel_init: + mov pc, lr diff --git a/arch/arm/cpu/arm1176/bcm2835/reset.c b/arch/arm/cpu/arm1176/bcm2835/reset.c new file mode 100644 index 0000000000..8c37ad9fd4 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/reset.c @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/wdog.h> + +#define RESET_TIMEOUT 10 + +void reset_cpu(ulong addr) +{ + struct bcm2835_wdog_regs *regs = + (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR; + uint32_t rstc; + + rstc = readl(®s->rstc); + rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK; + rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET; + + writel(BCM2835_WDOG_PASSWORD | RESET_TIMEOUT, ®s->wdog); + writel(BCM2835_WDOG_PASSWORD | rstc, ®s->rstc); +} diff --git a/arch/arm/cpu/arm1176/bcm2835/timer.c b/arch/arm/cpu/arm1176/bcm2835/timer.c new file mode 100644 index 0000000000..d232d7e067 --- /dev/null +++ b/arch/arm/cpu/arm1176/bcm2835/timer.c @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2012 Stephen Warren + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/timer.h> + +int timer_init(void) +{ + return 0; +} + +ulong get_timer(ulong base) +{ + struct bcm2835_timer_regs *regs = + (struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR; + + return readl(®s->clo) - base; +} + +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} + +void __udelay(unsigned long usec) +{ + ulong endtime; + signed long diff; + + endtime = get_timer(0) + usec; + + do { + ulong now = get_timer(0); + diff = endtime - now; + } while (diff >= 0); +} |