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authorPrabhakar Kushwaha <prabhakar@freescale.com>2015-03-20 19:28:06 -0700
committerYork Sun <yorksun@freescale.com>2015-04-23 08:55:54 -0700
commitf3f8c564a1cb745cef41c98dd2c29e3aad37dc4c (patch)
tree936263f07cd6f3fbab03028ff1e63d8653495194 /arch/arm/cpu/armv8/fsl-lsch3
parent060ef094600373ea2b25111006edc56c072d9bd7 (diff)
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armv8/ls2085a: Update common header file
ls2085a_common.h contains hard-coded information for NOR/NAND flash, I2C, DDR, etc. These are platform specific. Move them out of common header file and placed into respective board header files. Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector size. Enable command auto complete. Update prompt symbol. Set fdt_high to 0xa0000000 because Linux requires that the fdt be 8-byte aligned and below 512 MiB. Besides ensuring compliance with the 512 MiB limit, this avoids problems with the dtb being misaligned within the FIT image. Change the MC FW, MC DPL and Debug server NOR addresses in compliance with the NOR flash layouts for 128MB flash. Add PCIe macros. Enable "loadb" command. Disable debug server. Enable workaround for erratum A008511. Stop reset on panic for postmortem debugging. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-lsch3')
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