path: root/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
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authorBhupesh Sharma <>2015-01-06 13:11:21 -0800
committerYork Sun <>2015-02-24 13:08:06 -0800
commit9c66ce662c076fc1f5e57c4e72126e41d56d0b80 (patch)
treebb3c49d17da0fad2006a3dc2a26d96af08161bf1 /arch/arm/cpu/armv8/fsl-lsch3/cpu.c
parent38dac81b3d0e777f301ca98100bfbcab01d616c2 (diff)
fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accesses
This patch ensures that the TZPC (BP147) and TZASC-400 programming happens for LS2085A SoC only when the desired config flags are enabled and ensures that the TZPC programming is done to allow Non-secure (NS) + secure (S) transactions only for DCGF registers. The TZASC component is not present on LS2085A-Rev1, so the TZASC-400 config flag is turned OFF for now. Signed-off-by: Bhupesh Sharma <> Reviewed-by: York Sun <>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-lsch3/cpu.c')
0 files changed, 0 insertions, 0 deletions
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