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authorDonghwa Lee <dh09.lee@samsung.com>2012-07-02 01:15:53 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 14:58:24 +0200
commit46524beb4a451b7fdb172afaa1468b5300aa7cbf (patch)
tree88f12f75f897a83fe109ff0c04a73e58fef763e1 /arch/arm/cpu/armv7
parent2c5cd25cf9d7a79c9e5369115698e643e56e6f77 (diff)
downloadtalos-obmc-uboot-46524beb4a451b7fdb172afaa1468b5300aa7cbf.tar.gz
talos-obmc-uboot-46524beb4a451b7fdb172afaa1468b5300aa7cbf.zip
EXYNOS5: support display system register control
This patch supports display block system regisger control. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r--arch/arm/cpu/armv7/exynos/system.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/system.c b/arch/arm/cpu/armv7/exynos/system.c
index 4426611d1b..8424c57e95 100644
--- a/arch/arm/cpu/armv7/exynos/system.c
+++ b/arch/arm/cpu/armv7/exynos/system.c
@@ -62,8 +62,26 @@ static void exynos4_set_system_display(void)
writel(cfg, &sysreg->display_ctrl);
}
+static void exynos5_set_system_display(void)
+{
+ struct exynos5_sysreg *sysreg =
+ (struct exynos5_sysreg *)samsung_get_base_sysreg();
+ unsigned int cfg = 0;
+
+ /*
+ * system register path set
+ * 0: MIE/MDNIE
+ * 1: FIMD Bypass
+ */
+ cfg = readl(&sysreg->disp1blk_cfg);
+ cfg |= (1 << 15);
+ writel(cfg, &sysreg->disp1blk_cfg);
+}
+
void set_system_display_ctrl(void)
{
if (cpu_is_exynos4())
exynos4_set_system_display();
+ else
+ exynos5_set_system_display();
}
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