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authorSimon Glass <sjg@chromium.org>2011-11-05 03:56:53 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-09 17:30:09 +0100
commite75119d27838cab20c71605369baff2bfdbd4b0c (patch)
treecb73a82664acabeb283ce4b7b1faa05de6ffe0bd /arch/arm/cpu/armv7/start.S
parent831a077f11869dfc33ca2316a4bdeba203e8ce60 (diff)
downloadtalos-obmc-uboot-e75119d27838cab20c71605369baff2bfdbd4b0c.tar.gz
talos-obmc-uboot-e75119d27838cab20c71605369baff2bfdbd4b0c.zip
tegra2: Remove unneeded boot code
Since we have cache support built in we can remove Tegra's existing cache initialization code amd other related dead code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/armv7/start.S')
-rw-r--r--arch/arm/cpu/armv7/start.S12
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index b05be6cc94..6a77c71e1d 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -82,18 +82,6 @@ _end_vect:
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
-#ifdef CONFIG_TEGRA2
-/*
- * Tegra2 uses 2 separate CPUs - the AVP (ARM7TDMI) and the CPU (dual A9s).
- * U-Boot runs on the AVP first, setting things up for the CPU (PLLs,
- * muxes, clocks, clamps, etc.). Then the AVP halts, and expects the CPU
- * to pick up its reset vector, which points here.
- */
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
*/
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